Inner Product Computation In-Memory Using Distributed Arithmetic

In-memory computing using emerging technologies such as Resistive Random-Access Memory (ReRAM) has been proposed a promising substitute for future applications to address the ‘von Neumann bottleneck’. Multiplication is key component inner product computation in every digital signal processing (DSP) application and complexity of multipliers increases greatly with bit-width. Distributed arithmetic (DA) look-up tables adder-shifter module achieve multiplier-less efficient DSP architectures, particularly when one vectors constant known advance. Due memory wall, DA can be made furthermore latency energy-efficient implemented ‘in memory’. In this work, first time, we propose two design techniques compute completely DA. This accomplished by storing precomputed table contents ReRAM array implementing also same array. The majority gates which are turn realized READ operations Two methods mapping: latency-optimized area-optimized their comparison terms area presented. method-1 achieves $\approx 60$ % energy savings compared CMOS method-2 10.59 times higher throughput CMOS.